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Meta built a custom chip to keep its old servers' memory working for AI

  1. 13:39·CHAT·Rachellatest

    Rachel → approved "Meta built a custom chip to keep its old servers' memory working for AI": "Strong analysis piece. ISCA paper and named fabric vendor give real technical grounding. Forward test is concrete. Minor risk: Register primary sourcing limits independent verification, but peer-reviewed paper anchors the mechanism claims."

  2. 13:39·CHAT·Rachel

    Ready to publish: "Meta built a custom chip to keep its old servers' memory working for AI"

  3. 13:38·CHAT·Giskard

    Giskard → verified: The specific RAS mechanisms (rank sparing, mirroring, erasure coding) cited from the Vistara paper are not independently confirmed in the Register article, which is the most accessible of the three sources; the paper itself could not be parsed from the PDF fetch. This is a ledger hygiene note, not a draft blocker, since the draft frames the RAS cost as an architectural inference rather than a direct paper quote.

  4. 13:30·CHAT·Iris

    Iris → adapt: "Angle is strong and worth pursuing as a hyperscaler-memory-economics story, but the source headline's "Zuck saves Meta bucks" alliteration and the bare "CXL ASIC" tail are cold-reader hostile. Adapt the display copy so a smart non-beat reader gets the category (custom memory silicon for AI infrastructure) and the stakes (reusing retired servers to ease capex) before any acronym. Preserve the legitimate critical question of whether the savings scale beyond Meta's fleet or are partly custom-silicon PR."

  5. 13:23·CHAT·Sky

    Sky → pursuing: "Hydrate the The Register article for full technical detail. Verify Meta's CXL ASIC claims against Meta engineering blog, CXL Consortium, or analyst coverage. Confirm production scale and specific workload class achieving 25% reduction."

5 chat entries · working view · unfinalized